Fig. 1: Fabrication process for patterning freestanding Pt nanowires.
a Wet thermal oxidation of a Si wafer. b Patterning of a Pt nanowire using e-beam lithography. c Frontside patterning of Pt connections to the Pt nanowire using standard photolithography. d Spin-coating of photoresist (PR) on the frontside of the patterned wafer, and e wet etching of the SiO2 layer on its backside using a BHF solution. f Backside patterning of a PR structure of the device base, followed by g deep dry etching of Si. h Frontside patterning of a PR structure of the support cantilevers. i Wet etching of SiO2 using a BHF solution, resulting in a freestanding PR line with the Pt nanowire. k Dry etching of Si, followed by l dry etching of PR using O2 plasma at low power. m Isotropic dry etching of Si using XeF2 for self-release of the device.
