Fig. 8: Schematic illustration of the fabrication process of the microfluidic chip. | Microsystems & Nanoengineering

Fig. 8: Schematic illustration of the fabrication process of the microfluidic chip.

From: A magnetically enabled simulation of microgravity represses the auxin response during early seed germination on a microfluidic platform

Fig. 8

a The silicon wafer is spin-coated with SU-8. b SU-8 is patterned by UV exposure. c The SU-8 structure is obtained after the development process. d PDMS is casted on the SU-8 master. e The PDMS layer is peeled off from the master. f The PDMS layer and the glass substrate are bonded by oxygen plasma treatment

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