Fig. 13: Electronic–photonic assembly process. | Microsystems & Nanoengineering

Fig. 13: Electronic–photonic assembly process.

From: Integrated silicon photonic MEMS

Fig. 13

a Flow chart for scalable electrical and optical interfaces by providing gold stud bumps on the PIC (b, c) for flip-chip bonding to a glass interposer with solder-jetted bumps (d, e), and subsequent active alignment (f) and epoxy attach of fibre arrays for the high count of optical interfaces, and finally wirebonding (g) to a printed circuit board (for the final assembly, see Fig. 9 in the main text)

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