Fig. 5
From: Direct measurement of discrete valley and orbital quantum numbers in bilayer graphene
Electrical schematic of the capacitance measurement. DC voltages v t, v b and v g together control n 0 and p 0, with fixed v g ≈ −300 mV such that the transistor amplifier is at its optimal working point. For C S measurements, an AC excitation δV EX is applied to both top and bottom gate. δV S is then chosen to balance the bridge for a single set of DC voltages, i.e., such that δv out = 0, in which case C S/C std = δV S/δV EX. n 0 and p 0 are then swept and δv out monitored, from which C S(n 0, p 0) is extracted. For C A, the measurement proceeds identically but with opposite phase signals applied to the two gates
