Fig. 5 | Nature Communications

Fig. 5

From: Vapor transport deposition of antimony selenide thin film solar cells with 7.6% efficiency

Fig. 5The alternative text for this image may have been generated using AI.

DLTS analysis of VTD- and RTE-fabricated CdS/Sb2Se3 solar cells. a Schematic demonstration of the mechanism of DLTS measurement. b Variation of depletion width and the process of holes being trapped and emitted during the measurement. c DLTS signals of VTD-fabricated and RTE-fabricated devices at t1/t2 = 1 ms/10 ms. d Arrhenius plots obtained from DLTS signals. Ct0– and Wt0– are the junction capacitance and the depletion width at the moment before pulse voltage ended, respectively. Ct0+ and Wt0+ are the junction capacitance and the depletion width at the moment after pulse voltage ended, respectively

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