Fig. 1 | Nature Communications

Fig. 1

From: A vertical silicon-graphene-germanium transistor

Fig. 1The alt text for this image may have been generated using AI.

Device design and fabrication. a A Si–Gr–Ge transistor is built by directly stacking a Si membrane, single-layer graphene and a Ge substrate. b Optical image of a Si–Gr–Ge transistor (scale bar: 20 μm). c SEM image of a Si membrane on graphene (scale bar: 4 μm). d Illustration of the cross-section of the transistor. e Illustration of the basic operating principle of the transistor

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