Fig. 5: Analog content-addressable memory arrays.

a Simulated analog content-addressable memory (CAM) arrays with different sizes using extracted parasitic parameters. b The search latency in the one-bit mismatch case increases with the number of columns due to the increased ML capacitance. c There is a noticeable change in the acceptable search range with an increasing number of columns. In the worst case, up to 20 mV change is observed in an array of 64 columns. This still allows the capability to store and search 4-bits of information per analog cell across the 64 columns, but going beyond this would be challenging with the present circuit. d On the other hand, the change with increasing number of rows is negligible up to 512 rows. The three-dimensional (3-D) plot shows the sensed ML voltage with respect to the input voltage applied to the DL in arrays with an increasing number of rows (or words). High logic level on the ML indicates that the searching input matches the stored memory, where the lower and the higher bounds (V_lo and V_high) are labeled in the plot. With an increasing number of rows the searching range of one cell in the array stays stable.