Fig. 1: Design of an ionic bipolar junction.
From: Ionic amplifying circuits inspired by electronics and biology
a Scheme of a solid-state npn bipolar junction transistor in the active mode; C, E, and B indicate collector, emitter and base, respectively. Veb and Vec denote voltage between emitter and base, and emitter and collector, respectively. Ic is the collector current, and Ib is the input current. b Scheme of an ionic equivalent of an npn transistor with voltages, Veb, Vec, as applied in the experiments. Veb is applied through the Au gate electrode shown in orange. Blue regions of the device correspond to a zone with positive surface charges that lead to accumulation of anions (marked as blue dots); the red region is negatively charged and filled with cations (marked as red dots). A zone filled with anions is an ionic equivalent of an n doped semiconductor; a zone filled with cations is an ionic equivalent of a p doped semiconductor. c Arrangement of two 40 nm thick silicon nitride chips (shown in blue) and the Nafion film (red) used in the ionic transistor. A pore through the silicon nitride and Nafion sandwich was drilled by focused ion beam. Silicon nitride was modified chemically to render the surface positively charged. Nafion is negatively charged thus expected to be filled with cations. d Device scheme for the transistors with smaller pore size. This transistor was assembled using two silicon nitride chips with nanopores drilled prior to the device assembly. A Nafion layer is present between the two chips, similar to the arrangement shown in c.
