Fig. 5: Experimental results.
From: Frequency-domain ultrafast passive logic: NOT and XNOR gates
a Receiver sensitivity, i.e., required average power at the output of the detection system to ensure a bit error rate (BER) <10−7, measured for each of the 64 channels (at 10 Gbit/s) of the 640 Gbit/s OTDM input (blue) and output (red) signals. b, c Eye diagrams (overlapping the temporal signals over eight consecutive bit time periods) of the 640 Gbit/s coherent digital b input data signal and c the inverted output data signal.
