Fig. 1: Device fabrication details.
a–h Growth and patterning process steps (see “Methods” section for details). For clarity, panel e shows device cross-section turned out-of-plane by 90 degrees with respect to drawings shown in panels a–d, f–h. Scanning electron microscopy (SEM) images of (i) patterned bottom electrodes, (j) partially planarized bottom electrodes through chemical-mechanical polishing and etch-back, and (k) a fragment of completed crossbar array. l SEM image of the full 64 × 64 memristor crossbar array. Bottom left and bottom right insets show, correspondingly, material layers at the device cross-section with corresponding thicknesses in nanometers, and the packaged chip.
