Fig. 3: Electronic performance of fully stretchable OFET arrays. | Nature Communications

Fig. 3: Electronic performance of fully stretchable OFET arrays.

From: Wafer-scale integration of stretchable semiconducting polymer microstructures via capillary gradient

Fig. 3: Electronic performance of fully stretchable OFET arrays.

a Schematic illustration of a fully stretchable OFET constructed by curvilinear microstructure arrays as the semiconducting channel, SEBS as gate dielectrics, CNTs as the source, drain, and gate electrodes. b Optical image of 112 fully stretchable OFET arrays. c Zoom-in image of an OFET device with the channel length of 30 μm, the width of 90 μm, gate dielectric thickness of 1.2 μm, and capacitance of 1.5 nF cm−2. d Transfer curves of the fully stretchable PDVT-10 polymer OFET (VD = −30 V) in the unstretched state and at 100% strain parallel and perpendicular to the charge transport direction. Solid lines and dashed lines are IDSVGS curves and |IDS|1/2VGS curves of these devices, respectively. e Transfer curves of 40 devices in the 112-transistor arrays at 0% strain. f Statistical mobilities of OFETs during up to 1000 stretch-release cycles at 50% strain parallel (εx = 50%) and perpendicular (εy = 50%) to the charge transport direction. Each point in (f) represents average values obtained from five OFET devices. g, h Optical images of stretchable NAND gate (g) in its initial state and (h) at 100% applied strain in the horizontal direction, where VA and VB are the input voltages at A and B terminals, respectively. i Output–input characteristic curves of the NAND gate at 0% and 100% strain. Scale bars; b 4 mm, c 400 μm, g 100 μm, h 100 μm.

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