Fig. 5: Electric field control of ferroelectric CDW logic circuits.
Schematic illustration of the ferroelectric DW logic circuits for the readout signal of low and high voltages and the fan-out function. The bidirectional arrow indicates that the readout signals of low and high voltages can be transformed into each other by electric-field-induced connection and disconnection of a CDW. The schematics for the CMOS circuit and magnetic DW logic circuit, redrawn from ref. 8 are also illustrated for comparison. E represents the applied in-plane electric field.
