Fig. 2: CMOS-compatible device fabrication. | Nature Communications

Fig. 2: CMOS-compatible device fabrication.

From: Sub-10 fJ/bit radiation-hard nanoelectromechanical non-volatile memory

Fig. 2: CMOS-compatible device fabrication.

a, b Cross-sectional TEM images of the pipe-clip spring and bent cantilever of the fabricated NEM-NVM, respectively. Inset figures indicate the cross-section plane. c Tilted-view SEM image of the air-suspended NEM-NVM after the release process. d Optical photograph of the 8-inch Si wafer fabricated by well-established CMOS manufacturing processes. e Large-area uniformity of the resistance of the pipe-clip springs represented by histograms (105 devices). \(\mu\) and \(\sigma\) represent the average and standard deviation of the resistance, respectively. f Measured electrical resistance with respect to the length (L) of the fixed-fixed tungsten beam. The fixed-fixed tungsten beam with the 4-point probe electrodes is shown in the inset (width, \(W\) = 300 nm). The error bars represent the standard deviations among the beams (n ≥ 30).

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