Fig. 3: Demonstration of vector-matrix multiplication (VMM) using 3D FeNAND. | Nature Communications

Fig. 3: Demonstration of vector-matrix multiplication (VMM) using 3D FeNAND.

From: Highly-scaled and fully-integrated 3-dimensional ferroelectric transistor array for hardware implementation of neural networks

Fig. 3

a Weight update and read operation method for 3D FeNAND cell. For potentiation and depression operations, voltage pulses with incremental amplitudes were applied to the selected WL, and the selected BL was set to 0 V. Program-inhibit pulses with incremental amplitudes were applied to unselected BLs. The conductance of the devices was confirmed by measuring the current of the selected BL. b Potentiation and depression characteristics of 3D FeNAND cell. c Equivalent circuits (left) and schematic illustration (right) of VMM operation. Input voltages were applied to BLs and the product of VMM operation was measured at SLs. The output currents summed at the SLs were equal to the product of the input voltage applied to BLs and the conductance of memory cells. d Measured ISL after VMM operation. BL voltages (VBL0 and VBL1) were used as the input vector and conductance values of ferroelectric memory cells were used as the weight matrix. The measured ISL showed the summed output depending on the value of the input VBL.

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