Fig. 1: Material stack and heterostructure field effect transistor characterization.
From: Reducing charge noise in quantum dots by using thin silicon quantum wells
a Schematics of the 28Si/SiGe heterostructure and dielectric stack above. z indicates the heterostructure growth direction. Circles represent remote impurities at the semiconductor/dielectric interface and perpendicular symbols represent misfit dislocations that might arise at the quantum well/buffer interface due to strain relaxation. b, c BF-STEM images from heterostructure C highlighting the semiconductor/dielectric interface and the 5 nm thick 28Si quantum well, respectively. d Mobility μ and e conductivity σxx measured as a function of density n at a temperature of 1.6 K in a Hall bar H-FET from heterostructure C. The red curve in e is a fit to percolation theory.
