Fig. 1: Wafer-scale high-κ dielectric layers transfer process and characterization.
From: Wafer-scale high-κ dielectrics for two-dimensional circuits via van der Waals integration
a–c Schematics and optical images of wafer-scale dielectric lamination process with three steps: pre-deposition on PVA sacrifice layer using ALD process (a), dielectric dry peeling-off (b), and dielectric lamination on top of target substrate (c). d AFM height measurement for the bottom side of transferred Al2O3 with a small RMS surface roughness of 0.3 nm, demonstrating atomic scale flat surface. e AFM surface roughness mapping of the 2-inch transferred film by measuring the RMS roughness over hundreds of locations across the wafer. f Layer-by-layer lamination of 2-inch-size Al2O3 and HfO2 dielectric film, demonstrating a vdW Al2O3/HfO2/Al2O3 oxide superlattice in wafer scale.
