Fig. 8: Optoelectronic synapses for light-programmable reservoir computing system.

a Schematic of the process flow in reservoir computing system, composed of input, reservoir, readout, and output layer. The number of pixels is minimized by encoding. b Original MNIST pattern consisting of 400 pixels (20 × 20) is compressed into a 100-pixel pattern (5 × 20) through RC layer. c Measured 20-cycle d.c. I–V characteristics of CH-P-integrated memristor at low voltages (I_cc was set to 0.11 mA) exhibiting threshold switching. d PSC variation of CH-P-integrated memristor at a single R-light (450 nm) pulse depending on the amplitude of pulse (1–20 mW cm⁻²). Inset figure is large magnification. e PSC variation of CH-P-integrated memristor at four consecutive R-light pulses. Amplitude and interval of R-light pulses are 5 mW cm⁻² and 50 ms. Pulse width in (d) and (e) is fixed at 50 ms. f, g PSC responses of CH-P-integrated memristor to 16 different cases of pulse stream. PSC data measured from 10 devices are presented in (g). Read voltage in (d–g) is 0.05 V. h Inference accuracy of the neural network with the light-programmable RC system.