Fig. 4: Analysis of the leakage current between the single-photon avalanche diode (SPAD) and the carrier extraction structure (CES).
a Simulated crosstalk current-voltage (I–V) characteristics of the pixel in the array with the distances between the SPAD and the CES (d) varying from 26 μm to 7 μm, when the CES is biased at 0 V (Vces = 0 V). b The flow chart of the crosstalk current density (cyan solid lines) when the pixel is biased at 90% breakdown voltage (0.9Vbr, 49.5 V), at d = 12 μm and Vces = 0 V. The figure also shows the electric field in the device cross-section surface (color legend on the right). Only the 0–40 μm region of the simulation structure is presented. c–e Source analysis of this hole leakage current. The distribution of the valence band c in the device cross-section at the pixel bias voltage of 0.9Vbr and d at the position of 100 nm below the surface (blue dotted line in Fig. 4c, z = 6.92 μm) at different pixel bias voltages from 0 V to 55 V. e The potential barriers (ΔEv) at different pixel bias voltages while the distance d varied from 17 μm to 7 μm.
