Table 1 The selection of the reverse bias voltage (Vces) applied on the carrier extraction structure (CES) to ensure that the pixel and the CES work independently at the different distances (d)

From: High crosstalk suppression in InGaAs/InP single-photon avalanche diode arrays by carrier extraction structure

Symbol

d (μm)

Vces (V)

Simulated

>12

0–39

12

1–39

7

10–39

3

35–39

Experimental

26

0–39a

6

10–39b

  1. 39 V is the maximum reverse bias voltage applied on the CES. Measured results in arrays with a 100 μm pixel pitcha and a 50 μm pixel pitchb.
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