Fig. 6: Performance analysis—II.
From: An ultra energy-efficient hardware platform for neuromorphic computing enabled by 2D-TMD tunnel-FETs
Comparison of the energy efficiency of the designed NM circuit implemented with 2D-TFET and LSTP circuits. a The energy dissipation per clock cycle as a function of frequency plotted for an activity factor of 10−6. Frequencies correspond to fmax and is plotted for corresponding VDD. Plot shows tremendous energy-efficiency benefits of implementing NM circuits with TFET w.r.t its LSTP counterpart, with energy efficiencies of several orders of magnitude across the entire frequency range. b The ratio of the energy dissipation per clock cycle for the LSTP implementation compared to that of the TFET plotted as a function of VDD with corresponding fmax at various activity factors. The horizontal dotted line corresponds to a ratio of 1, thereby implying equal LSTP and TFET energy dissipation. TFET is more advantageous overall, especially for AF below 10−2, and the energy efficiency increases at lower VDD. c Energy dissipation per clock cycle plotted as a function of the activity factor plotted by taking the best-case energy dissipation of both TFET and LSTP, corresponding to b. The activity factor around which the energy dissipation of the TFET implementation becomes lower than that of the LSTP is shown by a vertical dotted line, showing larger energy efficiencies for 2D-TFETs at lower AFs.
