Fig. 9: An overview of the Xylo benchmarking system.
From: The neurobench framework for benchmarking neuromorphic computing algorithms and systems
Left: Diagram of host and SUT communication. A simulator of the analog encoding module is run on a PC and streamed to the SNN inference core via USB. After inference, outputs are routed back to the PC for classification. An on-board FPGA configures and records power of the Xylo components. Right: The Xylo™ Audio 2 hardware development kit (HDK), used as the SUT. The red outline marks the Xylo inference module. Figures taken, with permission, from Ke et al.78.
