Fig. 1: On-chip multi-dimensional interconnect architecture. | Nature Communications

Fig. 1: On-chip multi-dimensional interconnect architecture.

From: Edge-guided inverse design of digital metamaterial-based mode multiplexers for high-capacity multi-dimensional optical interconnect

Fig. 1: On-chip multi-dimensional interconnect architecture.The alternative text for this image may have been generated using AI.

a Artistic representation for an on-chip link between two XPUs utilizing inverse-designed digital metamaterials within future optical compute interconnect systems. Here, the term “XPU” serves as a device abstraction including various computational architectures, including CPUs, GPUs, FPGAs, and other accelerators. These broadband, inverse-designed digital metamaterials facilitate the multiplexing of a substantial number of data channels across both wavelength and mode dimensions. Additionally, the system incorporates an E/O module for converting electrical signals to optical signals and an O/E module for reverse conversion. Signal processing can be supported by co-packaged CMOS electronics. b Strategies for enhancing interconnect capacity across three dimensions: symbol, wavelength, and mode. This study showcases the integration of MDM and DWDM, enabling nearly a hundred wavelength channels per orthogonal mode. Each channel efficiently supports high-order pulse amplitude modulation (PAM) signals, significantly expanding the data capacity per waveguide. c Foundry-compatible inverse-designed digital metamaterials. Our design features a minimum feature size of 120 nm, suitable for robust and large-scale production by commercial foundries. Compared to conventionally designed high-order mode MUX, the inverse-designed MUX significantly reduces the footprint by an order of magnitude.

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