Fig. 3: Memory characterization of the n-branch and p-branch in the non-volatile anti-ambipolar transistor.

a Transfer curves measured with global gate voltage V_GG round sweeping from negative to positive and back to negative. The maximum V_GG ( | V_GG|_max) from 5 V to 20 V. b Variation of memory window and on/off ratio with varying sweeping range. c Threshold voltage V_th shifting after different positive V_GG spikes were applied. The dash line represents the initial state. d Mean value of sampling current of the WSe₂ memory after writing/erasing operations under various pulse widths. e Mean value of sampling current of MoS₂ memory after writing/erasing operations under various pulse widths. f 10,000 cycles endurance behavior by applying alternating V_GG pulses of 30 V amplitude and 0.3 s width with a reading voltage of V_DS = 1 V. g Multi-level memory states in WSe₂ memory are achieved with increasing V_GG pulse number. h Multi-level memory states in MoS₂ memory are achieved with increasing V_GG pulse number. Both WSe₂ and MoS₂ memory show a long retention time beyond 10⁴s characterized at state-0, state-4. i The operation speed and endurance of the PdSe₂-contacted complementary FGTs in comparison with the state-of-the-art 2D memory devices^{31,32,54,55,56,57,58,59,60,61,62,63,64,65}.