Fig. 2: Memristor-based ADC design.
From: Memristor-based adaptive analog-to-digital conversion for efficient and accurate compute-in-memory
a Schematic of a memristor-based Q-cell. b Simulated responses to the input voltage, including voltages at nodes A and B, and the output of the Q-cell. c Schematic of the proposed ADC at 3-bit precision, showing the arrangement of four Q-cells and decoder to achieve 3-bit precision quantization. d Illustration of the proposed ADC at 3-bit precision. When input 0.8 V is applied, the cell output is 1110, and the ADC output is decoded to 110.
