Fig. 3: Realization of scalable logic computing.
From: Light-programmable mechanical computing via polyaniline composite film
a-i AND gate circuit constructed with two single-pole single-throw (SPST) relays in series, with optical inputs (A, B) indicated in sky blue solid circles, electrical output (QAND) in orange solid circles, and the input voltage (Vcc) in black solid circles. ii The corresponding optical image of the AND gate. Scale bar: 5 mm. b-i OR gate circuit constructed with two SPST relays in parallel, with optical inputs (A, B) indicated in sky blue solid circles, electrical output (QOR) in orange solid circles, and the input voltage (Vcc) in larger black solid circles. ii The corresponding optical image of the OR gate. Scale bar: 5 mm. c-i XOR gate circuit constructed with two single-pole double-throw (SPDT) relays in parallel, with optical inputs (A, B) indicated in sky blue solid circles, electrical output (QXOR) in orange solid circles, and the input voltage (Vcc) in larger black solid circles. ii The corresponding optical image of the XOR gate. Scale bar: 5 mm. d Measured input and output voltages for all input combinations of (A, B) for the AND, OR, and XOR gate. e One-bit full adder circuit constructed by cascading AND, OR, and XOR gates. Optical inputs (A, B, Cin) are indicated in sky blue solid circles, while electrical outputs (QSum, QCout) are marked in orange solid circles. f Summary of output voltages for various input combinations (A, B, Cin) of the full adder, demonstrating scalable and complete logic computing capabilities.
