Fig. 1: Stability and feasibility of the ferroelectric-based NC FETs.
From: The ferroelectric field-effect transistor with negative capacitance
a Bulk MIS FET. Pale blue: p-type semiconducting substrate; dusty blue: source (S) and drain (D) of n-doped regions connected by conducting channel; sky blue: bottom ground electrode. The gate stack: gate electrode and oxide gate dielectric layer (yellow green). Right: equivalent circuit comprising gate dielectric capacitance, Cg, and capacitance to the ground, Cs, of the substrate. Solid lines depict electrodes, dashed lines depict interfaces without electrodes; Vg is the applied gate voltage, Vs is the channel potential. b The normalized energy, W/∣W0∣, and polarization states of the ferroelectric (orange) capacitor as a function of the normalized driving charge Q/Q0. Here Q0 and W0 are the equilibrium charge and energy of the monodomain short-circuited capacitor, respectively. The unstable energy branch (dashed line) depicts the energy of the monodomain state. The energy of a stable two-domain state is shown by the red curve. Pluses and minuses show the distribution of charges at the plates. c Multidomain structure of the MFS FET with redistributed electric charges at the top gate electrode and fringing electric fields (red loops) at the FS interface. Ferroelectric capacitance CNC < 0 replaces Cg > 0 of the MIS FET. d MFIS FET incorporates the dielectric layer with Cd > 0. e MFMIS FET integrating a floating gate electrode into the MFIS FET between ferroelectric and dielectric layers. f The coated c-MFMIS FET: the dielectric shell (yellow) with Cc > 0 coats the ferroelectric layer.
