Fig. 3: Junction and shuttling sequence. | npj Quantum Information

Fig. 3: Junction and shuttling sequence.

From: Compilation and scaling strategies for a silicon quantum processor with sparse two-dimensional connectivity

Fig. 3

a Schematic diagonal view of the junction connecting two \({x}^{{\prime} }\) and two \({y}^{{\prime} }\) submodules. b Top view of the junction. c Shuttling sequence from \({x}^{{\prime} }\) submodule at the left to \({y}^{{\prime} }\) submodule at the bottom. Arrows indicate three consecutive spin shuttling operations (i–iii), followed by a Swap operation, and another three consecutive spin shuttling operations (v–vii). d Same as c, abstracted. e Hardware topology of the junction. Qubits (dots) of \({x}^{{\prime} }\) and \({y}^{{\prime} }\) submodules are connected via six shuttling and one Swap operations (lines).

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