Abstract
Two-dimensional semiconductors are emerging as crucial materials for the post-Moore era. However, the transition to industrial-scale applications is hindered by engineering challenges, including the contact engineering. Among different strategies, edge contact offers advantages of ultimate contact scaling and the elimination of Fermi level pinning, but struggles with co-optimization between on-state current, threshold voltage and off-state leakage current. Here we address these challenges by utilizing an in situ multistep process, in which etching, soft plasma treatment and metal deposition are performed sequentially within the same custom-designed high-vacuum chamber to minimize interface defects. This approach enables molybdenum disulfide (MoS2)-based edge-contact field-effect transistors exhibiting an ultralow leakage current of 1.75 × 10−20 A μm−1 at zero gate voltage and an enhanced on-state current. The optimized capacitorless two-transistor dynamic random-access memory (DRAM) achieves a quasi-non-volatile memory operation, 5-bit memory accuracy and nanosecond-level write speed, demonstrating the potential for two-dimensional semiconductor-based circuits and memory devices.
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Data availability
All data needed to evaluate the findings of this study are available within the Article. Source data are available from Figshare via https://doi.org/10.6084/m9.figshare.30818588 (ref. 59). Source data are provided with this paper.
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Acknowledgements
This work was supported by the National Key Research and Development Program (grant 2021YFA1200500), the National Natural Science Foundation of China (grants 62374037, 12334005, 12174060 and 12404089), the Innovation Program of Shanghai Municipal Education Commission (grant 2021-01-07-00-07-E00077), the Science and Technology Commission of Shanghai Municipality (grant 23JC1401100) and the Shanghai Pilot Program for Basic Research—Fudan University 21TQ1400100 (grant 23TQ008). This work has been supported by the New Cornerstone Science Foundation through the XPLORER PRIZE.
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W.B., P.Z. and S.C. supervised the project. S.G., Y.Z., Z.Z. and J.Z. conceived the experiments. M.H. and S.C. performed the theoretical calculations. S.G., Y.Z., Z.Z., J.Z., X.D., M.A., Q.S., Y.H., Y.S., H.C., Y.T., X.H., J.W., Z.S., Q.C., Y.L. and J.S. fabricated the devices. S.G., Y.Z., Z.Z., Z.C. and J.Z. performed the electrical measurements. Z.X. conducted the growth of MoS2. X.Y. and C.C. performed the Raman and PL experiments. S.G., Y.Z., M.H., Z.Z. and J.Z. wrote the original article. W.B., P.Z., S.C., Y.W., L.L., X.T., M.L., C.Y., H.M., M.L. and H.L. revised the article. All authors discussed the results and commented on the manuscript.
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Gou, S., Zhu, Y., Zhang, Z. et al. Quasi-non-volatile capacitorless DRAM based on ultralow-leakage edge-contact MoS2 transistors. Nat. Mater. (2026). https://doi.org/10.1038/s41563-025-02470-w
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DOI: https://doi.org/10.1038/s41563-025-02470-w
