Extended Data Fig. 3: Single-ended writing and reading performance of an SRAM cell, microscope image, circuit diagram, and truth table of an RLPU, and energy breakdown analysis of FLEXI-4 in compute mode.
From: A flexible digital compute-in-memory chip for edge intelligence
a,b, Probing test (a) represents writing ‘1’ in BL, and test (b) represents writing ‘0’, indicating the single-ended writing and reading in SRAM. The BL is driven as input, and the BLB is monitored as output. The observation that BLB follows BL suggests that the SRAM cell exhibits reliable switching behavior with low latency, even under a single-ended write of 10 ns. c, Microscope image and circuit diagram of an RLPU. d, Truth table of an RLPU. e, Energy breakdown of FLEXI-4 for a single multiplication at VDD = 5.5 V. Scale bars, 10 μm (c, top and bottom insets).
