Fig. 1: Large-scale quantum simulators using precision-engineered atom-based quantum dots in silicon.

a, Illustration of the STM hydrogen lithography technique used to fabricate the quantum dot arrays. An atomically sharp metallic tip scans a hydrogen-terminated silicon surface and selectively removes individual hydrogen atoms to create a lithographic mask of dangling silicon bonds. Subsequent phosphine dosing is used to selectively dope the lithographic region, embedding arbitrary 2D geometries of atom-based quantum dots. b, Examples of STM-defined lattices: hexagonal lattice with circular quantum dots (top left); honeycomb structure (top right); Lieb lattice with rectangular and cross-shaped quantum dots (bottom right). c, Schematic of the quantum analogue simulator. The STM-defined array and Hall probes are encapsulated in about 80 nm of epitaxial silicon and a metallic top gate (Ti/Pd) is patterned directly over the array on the silicon surface. Charge-transport measurements are performed by applying a current or voltage through the source/drain contacts and reading out the two-point or four-point voltages at the source/drain or Hall contacts. d, A large-scale STM image of a square-lattice array, showing about 700 out of its 15,000 quantum dots. The terraces visible in the image have no impact on the physics of the dot array, as they are removed when the device is encapsulated in epitaxial silicon. Scale bars, 100 nm (b top left, d); 50 nm (b top right); 40 nm (b bottom right).