Table 1 Comparison between the proposed converter and other topologies.

From: High controllability soft switching step-up DC-DC converter with CI, (QBC) structure and VM technique

Converter

Number of

 

Voltage gain

Normalized Voltage Stress of Switches (VS∕VO)

Normalized Voltage Stress of Diodes (VD∕VO)

Max Eff. (%)

CG

SS

Input CR

S

D

C

L

CI

T

[1]

1

5

5

1

1

13

\(\frac{{n(3D+2)+(2 - D)}}{{2{{(1 - D)}^2}}}\)

\(\frac{{2+D(n - 1)}}{{n(3D+2)+(2 - D)}}\)

\(\frac{{2n}}{{n(3D+2)+(2 - D)}}\)

92.96

×D

×S

Low

[2]

1

4

2

1

1

9

\(\frac{{1+nD}}{{{{(1 - D)}^2}}}\)

\(\frac{1}{{1+nD}}\)

\(\frac{{(2 - D+nD)}}{{1+nD}}\)

88.11

×D

×S

[3]

1

3

4

1

1

10

\(\frac{{1+n}}{{1 - D}}\)

\(\frac{1}{{1+n}}\)

\(\frac{1}{{1+n}}\)

95.01

D

×S

Low

[4]

2

5

5

1

1

14

\(\frac{{2+2n+nD(1 - D)}}{{{{(1 - D)}^2}}}\)

\(\frac{1}{{2+2n+nD(1 - D)}}\)

\(\frac{{(1+2n - nD)}}{{2+2n+nD(1 - D)}}\)

94.2

×D

×S

Low

[5]

1

7

5

1

1

15

\(\frac{{1+n}}{{{{(1 - D)}^2}}}\)

\(\frac{1}{2}\)

\(\frac{{1+nD}}{{(n+1)}}\)

×D

×S

Low

[6]

1

5

4

1

1

12

\(\frac{{n+2}}{{{{(1 - D)}^2}}}\)

\(\frac{1}{{n+2}}\)

\(\frac{{1+n}}{{2+n}}\)

≤ 89

×D

×S

Low

[8]

2

8

8

0

2

20

\(\frac{{5 - 2nD+4n - D}}{{(1 - D)}}\)

\(\frac{1}{{(5 - {n_1}D+2{n_1} - D - {n_2}D+2{n_2})}}\)

\(\frac{{1+n}}{{(5 - {n_1}D+2{n_1} - D - {n_2}D+2{n_2})}}\)

94.6

×

D

×S

Low

[10]

4

2

4

2

1

13

\(\frac{{2(n+2)}}{{(1 - D)}}\)

\(\frac{1}{{2(n+2)}}\)

\(\frac{{n+1}}{{(n+2)}}\)

94.4

D

S

Low

[15]

2

4

4

1

1

12

\(\frac{{1+D+2n(1 - D)}}{{{{(1 - D)}^2}}}\)

\(\frac{{(1+D)}}{{1+D+2n(1 - D)}}\)

\(\frac{{2n}}{{1+D+2n(1 - D)}}\)

96.1

D

S

Low

[18]

3

5

4

0

2

14

\(\frac{{2n+2}}{{1 - D}}\)

\(\frac{1}{{2n+2}}\)

\(\frac{2}{{2n+2}}\)

96

×

D

S

Low

[20]

1

5

4

0

2

12

\(\frac{{n(D - {D^2})+nD+1}}{{{{(1 - D)}^2}}}\)

\(\frac{1}{{n(D - {D^2})+nD+1}}\)

\(\frac{n}{{n(D - {D^2})+nD+1}}\)

90.5

×D

×S

High

> 80%

[24]

1

8

8

0

1

18

\(\frac{{4+n(2 - D) - D}}{{1 - D}}\)

\(\frac{1}{{4+n(2 - D) - D}}\)

\(\frac{{n(2 - D) - D}}{{4+n(2 - D) - D}}\)

92.7

×D

×S

Med

55%

[26]

2

5

5

1

1

14

\(\frac{{3+2n - D(3+n - D)}}{{{{\left( {1 - D} \right)}^2}}}\)

\(\frac{1}{{3+2n - D(3+n - D)}}\)

\(\frac{{n(2 - D)}}{{3+2n - D(3+n - D)}}\)

≤ 94

×D

×S

High

> 80%

Prop.

2

5

5

1

1

14

\(\frac{{{D^2}(n+1) - D(4n+3)+4n+3}}{{{{(1 - D)}^2}}}\)

\(\begin{gathered} {S_1}:\frac{{(1 - D)}}{{{D^2}\left[ {2n+2 - k(n+1)} \right]+D\left( {2k+2nk - 6n - 5} \right)+4n+3}} \hfill \\ {S_2}:\frac{{{{(1 - D)}^2} - kD(D - 2)}}{{{D^2}\left[ {2n+2 - k(n+1)} \right]+D\left( {2k+2nk - 6n - 5} \right)+4n+3}} \hfill \\ \end{gathered}\)

\(\frac{{nD - {n^2}D+2{n^2} - 2n}}{{M(1 - D)(n - nD+D - 1)}}\)

94.51

D

S

Med

50%

  1. (S, D, C, L, CI, T, indicate the number of switches, diodes, capacitors, inductors, coupled inductors and total components respectively).
  2. Eff efficiency, CG common ground, × = No,  = Yes, SS soft switching on semiconductors (D: diodes, S: switches), CR current ripple, Low = less than 30%.