Table 1 Comparative performance of the proposed QZSDMC.
References | Control Method | Voltage Gain | THD (Output Voltage) | THD (Output Current) | Voltage Stress | Current Stress | Implementation Platform |
|---|---|---|---|---|---|---|---|
Proposed QZSDMC in this paper | ISVPWM, PI Controller | 1.15 | 1.2% | 2.4% | 95 V (lower) | 1 A (lower) | FPGA, MATLAB/Simulink |
K. Amei (2020) | CBPWM, PI Controller | 1.1 | 2.6% | 3.1% | 130 V | 2.5 A | DSP |
Q. Lei (2021) | SVPWM, FOC | 1.05 | 4.5% | 4.8% | 150 V | 3 A | FPGA |
J. Li (2022) | CBPWM, PID Controller | 1.12 | 3.0% | 2.8% | 120 V | 1.5 A | MCU |
Y. Xu (2023) | Modified SVPWM, Fuzzy Logic | 1.08 | 3.5% | 3.0% | 140 V | 2 A | FPGA |