Fig. 2 | Scientific Reports

Fig. 2

From: Fabrication and dimensional scaling of SiNW-FET array via AFM-LAO lithography and self-limiting oxidation

Fig. 2

Morphological and structural characterization of the fabricated SiNW-FET array: (a) FESEM image of SiNW-FET structure patterned via AFM-LAO before etching, (b) FESEM image after etching, (c) magnified FESEM image of nanowires prior to SLO treatment, (d) corresponding image after three SLO cycles at 1000 °C, indicating dimensional reduction, (e) AFM 3D surface profile of the SiNWs post-SLO showing low surface roughness (Ra = 0.227 nm), (f) AFM top-view and cross-sectional profile of the SiNW array, and (g) schematic diagram of trapezoidal cross-section used for SVR calculation.

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