Fig. 4
Electrical characteristics of Te0.7Se0.3 TFT with and without both Al2O3 passivation and SiO2 interfacial layer. (a) Schematic illustration of the Te0.7Se0.3 TFT device structure. (b) Optical image of a fabricated Te0.7Se0.3 TFT. (c) Schematic illustration for carriers transport in with and without a SiO2 interfacial layer. (d, e) Transfer and output characteristics of Te0.7Se0.3 TFTs with and without both passivation and SiO2 interfacial layer. (f, g) Electrical parameter comparison of the Te0.7Se0.3 TFTs with and without both passivation and the SiO2 interfacial layer. (h) Threshold voltage shift (∆VTH) of the Te0.7Se0.3 TFTs with and without a SiO2 interfacial layer under PBS test measured at stress condition of 9.1 and 6.7 V, respectively.
