Table 1 Terminal voltages and potentials.

From: Common-mode control and confinement inversion of electrostatically defined quantum dots in a commercial CMOS process

Voltage

Description

Equation (if applicable)

\(V'_\text {QR0}\)

Source potential

 

\(V'_\text {QR1}\)

Drain potential

 

\(V'_\text {QA0}\)

QA0 potential

 

\(V'_\text {QA1}\)

QA1 potential

 

\(V'_\text {QT0}\)

QT0 potential

 

\(V'_\text {QT1}\)

QT1 potential

 

\(V'_\text {QT2}\)

QT2 potential

 

\(V'_\text {BG}\)

Back-gate potential

 

\(V_\text {CM}\)

Common-mode voltage

\(\left( V'_\text {QR0} + V'_\text {QR1} \right) /2\)

\(V_\text {BG}\)

Back-gate potential w.r.t source

\(V'_\text {BG} - V'_\text {QR0}\)

\(V_\text {DS}\)

Drain-to-source voltage

\(V'_\text {QR1} - V'_\text {QR0}\)

\(V_\text {QA0}\)

QA0 potential w.r.t source

\(V'_\text {QA0} - V'_\text {QR0}\)

\(V_\text {QA1}\)

QA1 potential w.r.t source

\(V'_\text {QA1} - V'_\text {QR0}\)

\(V_\text {QT0}\)

QT0 potential w.r.t source

\(V'_\text {QT0} - V'_\text {QR0}\)

\(V_\text {QT1}\)

QT1 potential w.r.t source

\(V'_\text {QT1} - V'_\text {QR0}\)

\(V_\text {QT2}\)

QT2 potential w.r.t source

\(V'_\text {QT2} - V'_\text {QR0}\)