Fig. 5

(a) Two zigzag foldings of the same five-qubit linear DPQA processor into a \(3 \times 3\) grid layout. At m-stage 3, the relevant edges \(\{(1,2),(3,4)\}\) run horizontally in the left folding and vertically in the right one. In both cases, movements along these edges can occur in parallel, preserving the optimal total big moves. (b) Illustrates \(\Phi _{1}\), while (c) depicts \(\Phi _{2}\). (d) Presents the zigzag path \(\Phi _{5}\) within a \(10 \times 10\) grid, where the red and blue boxes highlight the configurations of \(\Phi _{3}\) and \(\Phi _{1}\), respectively. Similarly, (e) showcases the zigzag path \(\Phi _{6}\) in a \(12 \times 12\) grid, with the red and blue boxes highlighting the configurations of \(\Phi _{4}\) and \(\Phi _{2}\), respectively. The unvisited (or “wasted”) grid points are highlighted.