Table 18 Comparison of empirical side-channel resistance across cryptographic implementations.

From: TTEA: designing a quantum-ready and energy-conscious encryption model for secure IoT environments

Implementation

Power Correlation

Timing Deviation

Traces to Disclosure

Reference

Standard AES

0.87

2.8 \(\mu\)s

\(\sim\)1,000

24

Bit-Sliced AES

0.05

0.12 \(\mu\)s

>10,000,000

24

PRESENT S-Box

0.42

1.5 \(\mu\)s

\(\sim\)50,000

24

TTEA (Projected)

<0.05

<0.1 \(\mu\)s

>10,000,000

This Work

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