Fig. 1: Electrical performance and SBH extraction of MoS2 FET.
From: Interface trap states induced underestimation of Schottky barrier height in metal-MX2 junctions
a Schematic diagram of an as-fabricated device. b Transfer and c output characteristics of an exemplary transistor with a channel length of Lch = 200 nm. d Temperature-dependent transfer characteristics and e Arrhenius plot (log(IDS/T2) vs. 1000/T) showing expected negative slopes for lower gate biases and unexpected positive slopes at high gate biases (f) extracted effective barrier height (ϕB) as a function of applied gate voltage. Note that negative effective barriers are extracted for gate voltages larger than ~2.3 V.
