Fig. 2: Schematic of the experimental setup and photonic chips. | Communications Physics

Fig. 2: Schematic of the experimental setup and photonic chips.

From: Efficient hardware error correction with hybrid on-offline configuration algorithm for optical processor

Fig. 2: Schematic of the experimental setup and photonic chips.

a Testing system of the HOOC algorithm. The light generated by a tunable C-band laser and amplified by an erbium-doped fiber amplifier (EDFA) is directed through a polarization controller (PC) and into the photonic chip. The optical signals from the monitor ports within the MZI mesh are captured by a shortwave infrared (SWIR) camera. The output signals from the fiber array (FA) are converted into photocurrent and collected by a data acquisition (DAQ) board. b Image of the photonic chip packaged to the printed circuit board (PCB) and fiber array. FFT: fast Fourier transform; IFFT: inverse fast Fourier transform; BDUs: balanced detection units. Photographs of the fabricated photonic chips with the FFT-based MZI mesh (c) and the Clements-based MZI mesh (d).

Back to article page