Fig. 4: Circuit diagram and truth table.
From: Realistic behavioral model for ReRAMs capturing non-idealities

a, b Circuit diagram and truth table of logic gate IMPLY. c, d Circuit diagram and truth table of FELIX OR gate.
From: Realistic behavioral model for ReRAMs capturing non-idealities

a, b Circuit diagram and truth table of logic gate IMPLY. c, d Circuit diagram and truth table of FELIX OR gate.