Fig. 3: Devices fabrication of stacked 16 Ge0.95Si0.05 nanowires and stacked 12 Ge0.95Si0.05 nanowires without parasitic channel.
From: Fabrication and performance of highly stacked GeSi nanowire field effect transistors
Process flow (a) of the highly stacked GeSi nGAAFETs with the highlighted features (red). Tilt 52o SEM after fin formation (b) by the Cl2-based RIE and channel release (c) by H2O2 wet etching. d Simulated strain of 0.44% in the GeSi channel with the average WCH and HCH in the microbridge structure by ANSYS. Note that the orange dash line corresponds the as-grown condition. STEM-HAADF (e) and EDS mapping (f) of the stacked 16 Ge0.95Si0.05 nanowires. STEM-HAADF (g) and EDS mapping (h) of the stacked 12 Ge0.95Si0.05 nanowires w/o parasitic channels. Note that the red arrow points parasitic channel removal. The EDS mapping shows the nanowires surrounded by the in-situ TiN to ensure the GAA structure.
