Fig. 3: Loss performance of the modulator.

Insertion loss of the modulator at 0 V for the (a) Si and the (b) SOI substrates. The corresponding link power penalty curves are shown in (c) and (d) for the Si and SOI cases, respectively.

Insertion loss of the modulator at 0 V for the (a) Si and the (b) SOI substrates. The corresponding link power penalty curves are shown in (c) and (d) for the Si and SOI cases, respectively.