Fig. 2: A Hf_0.5Zr_0.5O₂-based synstor circuit.

a An optical image shows a 20\(\times \)20 synstor crossbar, composed of 20 rows of Ti input electrodes and 20 columns of Ti output electrodes. b A schematic illustration of a synstor composed of a vertical heterojunction of a Si channel, a SiO₂ dielectric layer, a ferroelectric Hf_0.5Zr_0.5Ο₂ layer, and a WO_2.8 conductive reference (Ref) electrode. The Si channel connects with a TiSi_0.9 layer and Ti input and output electrodes. An equivalent circuit for the synstor is also shown, featuring diodes representing the Schottky contacts between the Si channel and Ti input/output electrodes via the TiSi_0.9 layer, a transistor formed by the Si channel and SiO₂ dielectric layer, and a capacitor (C_HZO) representing the Hf_0.5Zr_0.5Ο₂ ferroelectric layer beneath the WO_2.8 reference electrode. c Voltage pulses (\({x}_{1}\)) applied on the first input electrode, voltage pulses applied on the first (\({z}_{1}\)) and second (\({z}_{2}\)) output electrodes, and currents flowing on the first (\({I}_{1}\)) and second (\({I}_{2}\)) output electrodes are shown against over time. The inference (\({I}_{1}={w}_{11}{x}_{1}\) and \({I}_{2}={w}_{21}{x}_{1}\)) and learning algorithms (\(d{w}_{11}/{dt}=\alpha {z}_{1}{x}_{1}\) and \(d{w}_{21}/{dt}=\alpha {z}_{2}{x}_{1}\)) are executed concurrently in the circuit in parallel analog mode under the various conditions, including (1) \({x}_{1}=4.2{V}\), \({z}_{1}={z}_{2}=0\), with \(d{w}_{11}/{dt}=d{w}_{21}/{dt}=0\); (2) \({x}_{1}=4.2{V}\), \({z}_{1}=4.2{V}\), \({z}_{2}=0\), with \(d{w}_{11}/{dt} > 0\) and \(d{w}_{21}/{dt}=0\); (3) \({x}_{1}=-2.1{V}\), \({z}_{1}=0\), \({z}_{2}=-2.1{V}\), with \(d{w}_{11}/{dt}=0\), and \(d{w}_{21}/{dt} < 0\); (4) \({x}_{1}=-2.1{V}\), \({z}_{1}=-2.1{V}\), \({z}_{2}=0\), with \(d{w}_{11}/{dt} < 0\) and \(d{w}_{21}/{dt}=0\); and (5) \({x}_{1}=4.2{V}\), \({z}_{1}=0\), \({z}_{2}=4.2{V}\), with \(d{w}_{11}/{dt}=0\) and \(d{w}_{21}/{dt} > 0\). d Comparative analysis of biological synapses³, and analog neuromorphic devices including synstors (this work), floating-gate transistors^29,30, memristors^{31,32,33,34,35}, and phase-change memory resistors³⁶.