Fig. 3: Stochastic computing implementation workflow.
From: Modified spike backpropagation design towards highly parallelable hardware implementation
a SVD-based decomposition: Synaptic update matrix approximated as outer product of forward spike vectors x and backward error vectors δ. b Probabilization: Normalization and truncation of x and δ to [−1, 1] and [0, 1], with heatmaps d illustrating truncation effects. c Stochastic encoding in 1T1R crossbar: Independent random pulse trains with probabilities proportional to \({x}_{i}^{prob}\) (word lines) and \({\delta }_{j}^{prob}\) (bit lines). Overlapping pulses (purple) trigger updates. e Example pulse sequences representing probabilities. f Update conditions: Only simultaneous gate and drain pulses induce conductance change. g Ideal simulation: Theoretical weight updates (red) versus stochastic coding results (blue) under linear memristor assumption.
