The speed of current-induced magnetic domain-wall motion in a synthetic antiferromagnet reaches a few hundred m/s, and by implementing it into memory devices, it is expected to realize higher-density memory with SRAM-level operation speeds. Two main hurdles are (1) ensuring that the initial spin states on both ends of the device are anti-parallel and (2) minimizing the property degradation during the etching process. Here, we present a new simple scheme of anti-parallel initialization and recovery process from the damage by post-annealing. Our report proves that these two obstacles can be solved, yielding a device with better performance than SOT-MRAM.
- Atsushi Okada
- Soichiro Mizusaki
- UngHwan Pi
