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Showing 1–5 of 5 results
Advanced filters: Author: Jim Ignowski Clear advanced filters
  • Finding solutions to the Boolean satisfiability problem (SAT) in computer science can be costly due to its computational complexity. Im and Böhm et al. propose a SAT solver accelerator architecture using in-memory computing hardware to achieve a  ~ 10 × speedup and a  ~ 1000 × gain in energy efficiency.

    • Haesol Im
    • Fabian Böhm
    • Ignacio Rozada
    ResearchOpen Access
    Nature Communications
    P: 1-13
  • The authors report a memristor-based system that analyzes raw analog signals from a genomic sequencer directly in memory. By bypassing slow data conversion, the system achieves substantial improvements in speed and efficiency, enabling real-time, on-site genomic analysis.

    • Peiyi He
    • Shengbo Wang
    • Can Li
    Research
    Nature Computational Science
    Volume: 5, P: 940-951
  • Current specialized function gradient computing hardware is not scalable to common higher-order functions. This work reports an approach for massively parallel gradient calculations of high-degree polynomials. Solving a Boolean satisfiability problem was experimentally implemented on an in-memory computing circuit.

    • Tinish Bhattacharya
    • George H. Hutchinson
    • Dmitri B. Strukov
    ResearchOpen Access
    Nature Communications
    Volume: 15, P: 1-11