Fig. 10: Schematic diagram of the TSV electroplating filling process.
From: Molecular electronic devices based on atomic manufacturing methods
a SEM image of blind vias etched via Bosch process, reproduced from ref.273, copyright 2011, with permission from Elsevier. b SEM image of dielectric isolation layer. c SEM image of copper seed layer. b, c reproduced from ref.271, copyright 2017, with permission from Springer Nature. d SEM image of copper electroplating filling in TSV process, reproduced from ref.276, copyright 2012, with permission from Electrochemical Society
