Fig. 3: Implementation of digital non-Foster-inspired electronics. | Nature Communications

Fig. 3: Implementation of digital non-Foster-inspired electronics.

From: Digital non-Foster-inspired electronics for broadband impedance matching

Fig. 3

a General structure diagram of the digital non-Foster-inspired electronics. The proposed electronics consists of the signal stage and the power stage. The signal stage contains the signal conditioning (sensors), signal sampling (ADC), DSP, signal output (gate driver). The amplitude-phase relation of the reference current iref and the reference output voltage uref of the proposed circuit is determined by setting the negative impedance reference Zref into the DSP. The power stage includes a DC source, a H-bridge with four SiC MOSFETs (S1 ~ S4), and a LC filter formed by inductor Ls and capacitor Cs. b The control program flowchart in DSP, including initializing peripherals, eCAP ISR for the operating frequency fs calculation and timer ISR for control signal generation. c Waveform schematic of the reference voltage uref, the reference current iref, and the output current io before the usage of self-adaptive PR closed-loop feedback control. d The output signal uS1 ~ uS4 of DSP, which is used to drive the behavior of the switch-mode electronics S1 ~ S4. e Output voltage waveform schematic of H-bridge uAB and LC filter uo. f Waveform schematic of uref, iref, and io after closed-loop control.

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