Table 1 Technological cost versus footprint reduction trade-offs

From: LDPC-cat codes for low-overhead quantum computing in 2D

 

Surface code + sc qubits65,78

High-rate qLDPC codes + sc qubits20

Repetition code + cat qubits51

High-rate LDPC code + cat qubits (this work)

Short-range interactions

yes (2D)

no (2D)

yes (1D)

yes (2D)

Qubit connectivity degree

3–4

6

2

4

NL = 100 footprints

    

\(\left.\begin{array}{l}\epsilon=1{0}^{-3}\hfill\\ {\kappa }_{1}/{\kappa }_{2}=1{0}^{-4}\end{array}\right\}\to {\epsilon }_{L}\le 1{0}^{-8}\)

N = 33,700

–

2400 (N/14)

–

–

2100 (N/16)

–

758 (N/44)

  1. The recently proposed architectures are compared to the surface code + superconducting (sc) qubits. The technological cost includes the locality of qubit interactions and the qubit connectivity degree on the chip (generally corresponding to the weight of the stabilizers). The footprint corresponds to the total number of physical qubits N required to implement a processor with NL = 100 logical qubits, with a logical error rate per code cycle and per logical qubit of ϵL ≤ 10−8, assuming circuit-level noise with a physical error rate ϵ = 10−3 for generic superconducting (sc) qubits or a ratio κ1/κ2 = 10−4 for cat qubits, where 1/κ1 is the single-photon lifetime of the resonator hosting the cat qubit and κ2 the two-photon stabilisation rate of the cat qubit. This ratio determines the error models of all cat qubit operations41,50. Concretely, the value κ1/κ2 = 10−4 corresponds to a circuit-level error model with state preparation and measurement infidelities ϵSPAM = 1.1 × 10−3, CNOT gate infidelity of ϵCNOT = 1.6 × 10−2 and idling errors of ϵidling = 1.1 × 10−3, that is, all operations are noisier than for a depolarizing error model with strength ϵ = 10−3. The reported footprint of our architecture corresponds to the case where bit-flip errors are entirely suppressed using the passive error correction provided by cat qubits, such that the active error correction code is devoted exclusively to phase-flip error correction. The ϵL≤10−8 target corresponds to a physical bit-flip time at the level of the cat qubit of TX ~ 13 minutes, which we deem to be reasonably close to the bit-flip times already demonstrated experimentally46,47,48 (Supplementary Discussion IB).
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