3D Integration of functionally diverse 2D materials for optoelectronic reservoir computing

Abstract

Recent years have seen remarkable progress in three-dimensional (3D) integration of non-silicon materials, enabling the convergence of diverse functionalities such as sensing, storage, and computing beyond mere transistor scaling. This advancement accelerates edge intelligence by enabling more efficient information processing at the source with reduced latency and power consumption. In this work, we contribute to this rapidly evolving landscape by demonstrating reservoir computing through 3D integration of In₂Se₃-based photodetectors with MoS₂-based memtransistors. Our top tier exploits the variation in photoresponse of an optical reservoir constructed using flakes of different thicknesses of In₂Se₃. The bottom tier deploys programmable MoS₂ memtransistors to convert the photocurrent into photovoltages which are subsequently processed by a trained readout circuit that is also based on MoS₂ memtransistors. Notably, the physical proximity between sensors and computing elements is less than 50 nm, surpassing current state-of-the-art packaging solutions. We also demonstrate the benefits of near-sensor information processing for better photoresponse calibration and to achieve higher photoresponse speed. Overall, our 3D stack, with its near-sensor and in-memory compute capability, marks a significant milestone in vertically stacked functional layers composed of heterogeneous materials beyond silicon for edge applications.

Introduction

Three-dimensional (3D) integration is a promising approach for enhancing near-sensor computing applications, offering significant improvements in performance, efficiency, and miniaturization^1,2,3,4,5,6. This advanced technology involves stacking and interconnecting multiple layers of semiconductor devices, sensors, and circuits vertically, creating a compact and highly integrated system. Currently, there are two distinct approaches to 3D integration: packaging and monolithic integration^5,7,8. The packaging method assembles independently fabricated components within a package, but this approach can suffer from increased via length, limited via density, and constrained performance improvements in latency and bandwidth. In contrast, the monolithic 3D integration (M3D) method employs fabrication techniques to stack components directly on top of each other through vias on a single unified chip, offering a more efficient approach with a smaller footprint, reduced parasitic effects, and better energy efficiency.

There have been several recent demonstrations in M3D integration, including 3D stacking of 2D material-based transistors^1,9, prototype systems that combine CNT transistors and resistive memory devices^10,11, and hybrid microchips that integrate 2D materials with CMOS technology^{12,13,14,15,16,17}. However, the full potential of M3D integration of heterogeneous materials remains untapped¹⁸. This integration is anticipated to be especially advantageous for neuromorphic edge applications, where computing needs to occur close to the sensor^19,20.

In this work, we accelerate reservoir computing (RC), a powerful computational paradigm for processing time-series data, using M3D integration of In₂Se₃ photodetectors and MoS₂ memtransistors that naturally meet the criteria for a physical reservoir. Specifically, the upper tier leverages the photoresponse variations from an optical reservoir built with In₂Se₃ flakes of varying thicknesses, while the lower tier employs programmable MoS₂ memtransistors to convert photocurrent into photovoltages. These photovoltages are then processed by a trained readout circuit, based on MoS₂ memtransistors. Remarkably, the sensors and computing elements are physically positioned within 50 nm of each other, exceeding the capabilities of current state-of-the-art packaging solutions. Additionally, we highlight the advantages of near-sensor information processing, which enhances photoresponse calibration and achieves faster photoresponse speeds. In short, we demonstrate the benefits of near-sensor and in-memory computing using 3D architecture for better information processing and for accelerating edge intelligence.

Results

M3D integration of In₂Se₃ photodetector and MoS₂ memtransistors

Figure 1a, b, respectively, show the schematic and cross-sectional high-angle annular dark-field (HAADF) images of our 3D integrated In₂Se₃ photodetector and MoS₂ memtransistor acquired through scanning transmission electron microscopy (STEM). Energy-dispersive X-ray spectroscopy (EDS) was used to obtain the elemental distribution of the 3D integrated device stack as depicted in Fig. 1c, d, and Supplementary Fig. 1. MoS₂ films utilized in this study were grown on epi-ready 2-inch c-plane sapphire (α-Al₂O₃) substrates using metal-organic chemical vapor deposition (MOCVD). In contrast, In₂Se₃ was exfoliated from a bulk single-crystal using Scotch tape. The growth parameters and detailed synthesis steps are outlined in our previous studies (also see Methods section)^{1,21,22,23,24,25}. Supplementary Fig. 2a–d, respectively, show the optical images of a representative MoS₂ memtransistor and In₂Se₃ photodetector and the corresponding Raman spectra obtained from the channel using a 532 nm laser. The in-plane ${E}_{2g}^{1}$ (387 cm⁻¹) and out-of-plane ${A}_{1g}$ (404 cm⁻¹) vibrational modes with a separation of 17 cm⁻¹ observed in the Raman spectra for MoS₂ confirm the monolayer nature of the film²⁶. Similarly, for In₂Se₃, the Raman peaks obtained at 89, 103, 180, 196, and 204 cm^–1 are attributed to E, A (LO + TO), A (LO), A (TO), and A (LO) phonon modes, respectively²⁷. Specifically, the peak obtained at 89 cm^–1 can be considered as an indication of 2H stacking within the In₂Se₃ crystal. Additionally, the presence of the A(LO) and A(TO) modes at 180 and 196 cm^–1 results from the LO–TO splitting and indicates a lack of inversion symmetry in the R3m structure. These Raman results confirm that the In₂Se₃ in this work has an α-phase crystal structure.

Fig. 1: Monolithic three-dimensional (3D) integration of In₂Se₃ photodetector and MoS₂ memtransistor.

a Schematic and (b) cross-sectional scanning transmission electron microscopy (STEM) high-angle annular dark-field (HAADF) images of our 3D integrated In₂Se₃ photodetector and MoS₂ memtransistor. c Energy-dispersive X-ray spectroscopy (EDS) results illustrating the elemental distribution within the white-dotted box region of the 3D integrated device stack depicted in (b). d Enlarged EDS elemental maps showing the distributions of In, Se, Mo, and S. e Photoresponse of 30 different In₂Se₃ photodetectors obtained using a source-to-drain bias of 1 V for an input optical stimulus of ${{{\rm{P}}}}_{{{\rm{IN}}}}$ = 10⁻¹⁰ Wm⁻². f Extracted responsivity (${{{\rm{R}}}}_{{{\rm{PH}}}}$) and (g) specific detectivity (${{{\rm{D}}}}^{*}$) values for each of these photodetectors. h Transfer characteristics of 100 MoS₂ memtransistors at a constant drain voltage (${{{\rm{V}}}}_{{{\rm{DS}}}}$) of 1 V. Corresponding distribution of (i) field-effect electron mobility (${{{\rm{\mu }}}}_{{{\rm{FE}}}}$), ( j) subthreshold slope (SS), and (k) threshold voltage (${{{\rm{V}}}}_{{{\rm{TH}}}}$) for these 100 devices. l Post-program and (m) post-erase transfer characteristics of a representative MoS₂ memtransistor, measured at ${{{\rm{V}}}}_{{{\rm{DS}}}}$ = 1 V after applying negative and positive back-gate voltage pulses of magnitude 5 V to 12 V, with a constant pulse width of 10 ms. n Analog programming and non-volatile retention characteristics for five distinct conductance states.

Following the material characterization, the 3D stack was fabricated on a commercially available substrate consisting of 285 nm SiO₂ on p⁺⁺ Si. It is important to note that other substrates compatible with our fabrication process flow can also be used. The monolayer MoS₂ memtransistor-based compute circuits are allocated to the bottom tier, while the In₂Se₃ photodetectors are placed on the top tier. We followed a sequential fabrication method, as depicted schematically in Supplementary Fig. 3. Initially, local back-gate electrodes (5 nm Ti and 15 nm Pt) were patterned using electron beam (e-beam) lithography, followed by metal deposition through e-beam evaporation. Subsequently, a 15 nm/3 nm/7 nm stack of Al₂O₃/HfO₂/Al₂O₃ was deposited using atomic layer deposition (ALD) to serve as the floating-gate (FG) dielectric stack for the bottom-tier MoS₂ memtransistors. As we will elucidate later, this stack enables non-volatile and analog programming of the MoS₂ memtransistors. Next, the MOCVD-grown monolayer MoS₂ film was transferred from the growth substrate to the prefabricated local back-gate islands using a polymethyl methacrylate (PMMA)-assisted transfer process. The MoS₂ film was patterned using e-beam lithography and etched with sulfur hexafluoride (SF₆) to define the channel areas. Next, the source/drain contacts for individual MoS₂ memtransistors and the connections for the readout circuit were delineated through e-beam lithography, followed by the deposition of 40 nm Ni and 30 nm Au. Finally, a lift-off process completed the fabrication for the bottom-tier MoS₂ devices and circuits.

Next, a 50 nm layer of Al₂O₃ was deposited using atomic layer deposition (ALD) to serve as the interlayer dielectric (ILD), separating the top and bottom tiers. The via access to the necessary source/drain and gate electrodes for the bottom-tier MoS₂ memtransistors was then patterned using e-beam lithography, followed by etching of the ILD with a BCl₃ plasma. In₂Se₃ flakes were subsequently placed on top of the ILD using mechanical exfoliation. Due to the random nature of the exfoliation process, flakes were found in various locations. However, we identified flakes that were physically close to the MoS₂ memtransistors for constructing the stacked devices. Next, the source/drain contacts for each In₂Se₃ photodetector, their connection to the inter-tier vias, and the vias were fabricated by patterning with e-beam lithography, followed by e-beam evaporation of 40 nm Ni and 30 nm Au. The metal stack thickness was chosen to be more than the ILD thickness to ensure proper via connection between the tiers. A final lift-off process to remove the excess metal concluded the fabrication of the 3D stack. A significant aspect of this approach of fabricating the In₂Se₃-MoS₂ 3D stack is that the entire fabrication process is maintained within a thermal budget of 180 °C. This temperature range ensures compliance with back-end-of-line (BEOL) requirements, enabling the addition of more tiers without compromising the integrity of the lower ones.

Initially, In₂Se₃-based photodetectors were examined for their optoelectronic response. The photocurrents for different devices were recorded by illuminating the sample with a blue LED (λ = 450–455 nm) at a fixed voltage (V_LED = 4 V). Figure 1e presents the photoresponse of 30 different In₂Se₃ photodetectors obtained using a source-to-drain bias of 1 V. The current through the photodetectors under dark (I_Dark) and in the presence of light (I_Light) was found to be different across the devices. This device-to-device variation can be primarily attributed to the varying thicknesses of the In₂Se₃ flakes, with thicker flakes generally contributing to higher current. Figure 1f, g, respectively, show the extracted responsivity (R_PH), defined as the ratio of photocurrent (${I}_{{PH}}={I}_{{Light}}-{I}_{{Dark}}$) to the input optical power (P_IN), and for each of these photodetectors. We found that the R_PH values range from ~ 2 A/W to ~ 8500 A/W, consistent with previous literature on In₂Se₃^28,29. Similarly, Fig. 1g shows the extracted specific detectivity (D*) values for each of these photodetectors. The lower D* values can be attributed to higher dark current in In₂Se₃ devices. As we will show later, integrating a programmable MoS₂ memtransistor with In₂Se₃ photodetector to convert the photocurrent into corresponding photovoltage offers the unique advantage of mitigating the response variation in R_PH and D*.

Note that In₂Se₃ was chosen as the photodetector material owing to its ability to generate photocurrent by utilizing photoconductivity changes. This contrasts with most other 2D materials that utilize the photogating effect as their primary mechanism for photocurrent generation²³. The photogating effect, while useful in some contexts^30,31, can introduce complexities such as longer response times and potential stability issues due to the involvement of trap states and localized charges. In contrast, photoconductance change enables faster response times and higher sensitivity, making it preferable for applications requiring high-speed and high-fidelity light detection. Additionally, In₂Se₃ offers the significant advantage of being a direct bandgap semiconductor regardless of its thickness, unlike most other 2D materials, which exhibit direct band gaps only at the monolayer limit. This property allows In₂Se₃ to absorb more light compared to other 2D materials, enhancing its effectiveness as a photodetector.

Next, the transfer characteristics i.e., the plot of drain current (I_DS) versus the back-gate voltage (V_BG) of 100 MoS₂ memtransistors in the bottom tier of the 3D stack, were acquired at a constant drain voltage (V_DS) of 1 V, as shown in Fig. 1h. Here, all MoS₂ memtransistors have a channel length (L_CH) and width (W_CH) of 500 nm and 1 µm, respectively. Figure 1i–k, respectively, show the distribution of field-effect electron mobility (μ_FE) extracted from peak transconductance, subthreshold slope (SS) extracted for three orders of magnitude change in I_DS, and threshold voltage (V_TH) extracted using the iso-current method at 100 nA for these 100 devices. The median values for μ_FE, SS, and V_TH were found to be ~3.5 cm²/Vs, ~210 mV/dec, and ~1.15 V, respectively. The ON-current values are comparable to those reported in recent literature for MoS₂ FETs at similar carrier concentrations and ${L}_{{CH}}$³². While enhancing the performance of MoS₂ memtransistors for future M3D ICs is a desirable goal, the current performance level is sufficient for the intended applications in this work.

A notable feature of our MoS₂ memtransistors is their programmability, which enables circuit reconfiguration based on specific application requirements. This is achieved through the FG stack composed of Al₂O₃/HfO₂/Al₂O₃, which facilitates analog programming and non-volatile storage of conductance states. In this structure, the HfO₂ layer, with its smaller bandgap, acts as a charge trapping layer between two Al₂O₃ layers with larger band gaps. This configuration is clearly illustrated in the schematic, cross-sectional STEM-HAADF image, and EDS elemental mapping shown in Fig. 1a–c. Furthermore, Fig. 1l, m displays the post-program and post-erase transfer characteristics of a representative MoS₂ memtransistor, measured at ${V}_{{DS}}$ = 1 V after applying negative and positive back-gate voltage pulses. The magnitude of programming/erase pulses ranged from 4 V to 12 V, with a constant pulse width of 10 ms. Figure 1n shows analog programming and non-volatile retention characteristics for five distinct conductance states, each maintained for 300 seconds. Supplementary Fig. 4 presents the programming endurance over 10⁹ cycles. As we will demonstrate in the next section, the reconfigurability of conductance states in MoS₂ memtransistors enables dynamic and on-chip calibration of the photoresponse from In₂Se₃ photodetectors.

Near-sensor compute for photoresponse calibration

While the device-to-device variation in photoresponse is desirable for our proposed RC application, the observed range of photocurrent across different In₂Se₃ flakes varied by four orders of magnitude, from a few hundred picoamperes to a few microamperes, as reflected in their corresponding ${R}_{{PH}}$ values. This wide variation complicates subsequent circuit processing. To mitigate this, the ${I}_{{PH}}$ can be converted into photovoltage (${V}_{{PH}}$) by connecting a load resistor in series with the In₂Se₃ photodetector, as shown in Supplementary Fig. 5a. Here, the output voltage (${V}_{{Out}}$) is measured at the common node, and the difference between the readings under light and dark conditions constitutes the photovoltage (${V}_{{PH}}={V}_{{Out},L}-{V}_{{Out},D}$). Note that although this bounds the ${V}_{{PH}}$ values between ${V}_{{GND}}$ and ${V}_{{DD}}$, it still allows the device-to-device variation to be reflected. Moreover, voltage outputs are preferred in ICs due to their ease of integration, power efficiency, and noise immunity, which facilitate simpler and more robust circuit designs and support both analog and digital processing. However, to obtain the best photovoltage response, the resistance of the In₂Se₃ photodetector (${R}_{{PD}}$) and the load resistor (${R}_{L}$) must be matched. Supplementary Fig. 5b shows the ${V}_{{PH}}$ response obtained from the same In₂Se₃ photodetector under identical optical stimuli for three different scenarios: ${R}_{{PD}}\gg {R}_{L}$, ${R}_{{PD}}\ll {R}_{L}$, and ${R}_{{PD}}\approx {R}_{L}$. Clearly, maximum ${V}_{{PH}}$ response is recorded when ${R}_{{PD}}\approx {R}_{L}$. However, due to the wide range of ${R}_{{PD}}$ values associated with the In₂Se₃ photodetectors, designing a matching load resistor becomes challenging without altering its footprint.

In comparison to resistors, a transistor is a better choice, as its resistance can be tuned by several orders of magnitude by applying a gate bias. Figure 2a, b, respectively, illustrate the different biasing states (${V}_{{BG}}$) of a MoS₂ transistor and the corresponding photovoltage response measured from the In₂Se₃ photodetector, connected through the via in our 3D stack, for an input optical stimulus of ${P}_{{IN}}$ = 10⁻¹⁰ Wm⁻². Supplementary Fig. 6 shows the responses from two other In₂Se₃ photodetectors under identical optical stimuli, each connected in series with the corresponding MoS₂ transistor. We recorded these responses under a ${V}_{{DD}}$ = 1 V. It is important to note that the ${R}_{{PH}}$ values for each of these three In₂Se₃ photodetectors were significantly different, approximately ~1000 A/W, ~180 A/W, and ~18 A/W, respectively. However, as shown in Fig. 2c, the extracted ${V}_{{PH}}$ plotted against ${V}_{{BG}}$ follows a similar non-monotonic trend for all three devices, despite each achieving its peak ${V}_{{PH}}$ values for different ${V}_{{BG}}$ values. This observation indicates that by adjusting the gate bias, we can achieve load matching for each In₂Se₃ photodetector, regardless of their varying photoresponse. Furthermore, unlike a resistor, there is no need to alter the physical footprint or design of the MoS₂ transistors.

Fig. 2: Near-sensor compute for photoresponse calibration.

a Different biasing states (${{{\rm{V}}}}_{{{\rm{BG}}}}$) of a MoS₂ transistor and (b) corresponding photovoltage response measured from the In₂Se₃ photodetector, connected through the via in our 3D stack, for an input optical stimulus of ${{{\rm{P}}}}_{{{\rm{IN}}}}$ = 10⁻¹⁰ Wm⁻² and ${{{\rm{V}}}}_{{{\rm{DD}}}}$ = 1 V. c Extracted ${{{\rm{V}}}}_{{{\rm{PH}}}}$ plotted against ${{{\rm{V}}}}_{{{\rm{BG}}}}$ for three pairs of In₂Se₃/MoS₂ stacked devices with different ${{{\rm{R}}}}_{{{\rm{PH}}}}$ values. Similar ${{{\rm{V}}}}_{{{\rm{PH}}}}$ response is seen in all devices indicating that by adjusting the gate bias, we can achieve load matching for each In₂Se₃ photodetector, regardless of their varying photoresponse. d Different programmed conductance state of a MoS₂ memtransistor and (e) corresponding responses from the In₂Se₃/MoS₂ stacked photodetectors under identical optical stimuli, measured using ${{{\rm{V}}}}_{{{\rm{BG}}}}$ = −1 V and ${{{\rm{V}}}}_{{{\rm{DD}}}}$ = 1 V. f Extracted ${{{\rm{V}}}}_{{{\rm{PH}}}}$ plotted against the programmed conductance values demonstrating that memtransistors can simplify circuit biasing due to their non-volatile and analog programming capabilities, allowing each In₂Se₃/MoS₂ stacked device to achieve similar ${{{\rm{V}}}}_{{{\rm{PH}}}}$ in response to identical optical stimuli with identical biasing.

While the above demonstration clearly highlights the advantage of using a transistor over a resistor, managing different biases for each MoS₂ memtransistor becomes complicated when many devices are involved. The key advantage of using a memtransistor over a conventional transistor is that the conductance of the memtransistor can be programmed in a non-volatile manner, allowing load resistance to be matched for a given ${V}_{{BG}}$. Figure 2d, e, respectively, show different programmed conductance states of a MoS₂ memtransistor and corresponding responses from the In₂Se₃/MoS₂ stacked photodetectors under identical optical stimuli, measured using ${V}_{{BG}}$ = −1 V and ${V}_{{DD}}$ = 1 V. Figure 2f shows the extracted ${V}_{{PH}}$ plotted against the programmed conductance values, resembling Fig. 2c. This demonstrates that memtransistors can simplify circuit biasing due to their non-volatile and analog programming capabilities, allowing each In₂Se₃/MoS₂ stacked device to achieve similar ${V}_{{PH}}$ in response to identical optical stimuli with identical biasing. It is important to mention that the performance of the MoS₂ memtransistor remains unaffected by light illumination under these operating conditions. This is because MoS₂ exhibits photogating effects primarily when the device is in the OFF state, where the channel conductance is low and trap states at the dielectric interface or within the semiconductor can capture photoexcited carriers. These trapped charges modulate the threshold voltage (${V}_{{TH}}$), effectively shifting the transfer characteristics.

However, in our case, the memtransistor was predominantly operated in the ON state, where the channel is already highly conductive. Under these conditions, the photogenerated carriers have a negligible effect on the device performance since the existing high carrier density in the ON state minimizes the relative contribution of any additional carriers introduced by light. Furthermore, the availability of empty trap states is minimal to alter the ${V}_{{TH}}$. By ensuring operation in the ON state, the MoS₂ memtransistor remains insensitive to light-induced effects.

The above demonstration underscores the significance of integrating in-memory compute elements with sensors, offering greater design flexibility and enhanced robustness in managing device-to-device variations compared to traditional designs. Notably, as shown in Supplementary Fig. 7, this approach is also effective in mitigating temporal drift in photodetector responses. We conducted an aging experiment by applying a 5 V source-to-drain voltage to an In₂Se₃ photodetector for durations ranging from 100 to 10,000 seconds. This voltage stress resulted in visible changes in the photoresponse, as shown in Supplementary Fig. 7a. While we observed an increase in photocurrent, the fall time degraded. We attribute this to the formation of defects in In₂Se₃, which may enhance photocurrent by allowing more photocarrier capture, but slow down the response as trapped carriers decay slowly. Despite these aging effects, we recalibrated the photodetector’s response by adjusting the conductance of the MoS₂ memtransistor connected as a load resistor. This adjustment, illustrated in Supplementary Fig. 7b, demonstrates the programming capability of the MoS₂ memtransistor, allowing us to mitigate the temporal variations in the In₂Se₃ photodetector. This approach again highlights the importance of integrating programmable components to maintain optimal device performance and ensure long-term reliability and stability in photodetector systems.

Finally, to assess the dynamic range of our stacked In₂Se₃/MoS₂ photodetectors, we conducted experiments using various light intensities from blue (λ = 450–455 nm), green (λ = 515–525 nm), and red (λ = 620–625 nm) LEDs and recorded the output voltage response, as shown in Supplementary Fig. 8a–c, respectively. The extracted ${V}_{{PH}}$ values, plotted against corresponding ${V}_{{LED}}$ values, exhibit a monotonic trend, as illustrated in Supplementary Fig. 8d–f. We also found that our stacked In₂Se₃/MoS₂ photodetectors can detect light pulses down to 100 µs as shown in Supplementary Fig. 9_.

We also investigated the photoresponse from M3D In₂Se₃/MoS₂ stack at various input optical frequencies (${f}_{{LED}}$), as shown in Supplementary Fig. 10a. The extracted ${V}_{{PH}}$ values, plotted against ${f}_{{LED}}$ in Supplementary Fig. 10b, remains constant up to 100 Hz, before steadily declining at higher frequencies, limited by the response times, ${\tau }_{R}$ and ${\tau }_{F}$. In the following sections, we will turn this speed limitation into an advantage by using it as “fading memory” to construct an optoelectronic physical reservoir for predicting time-series data. Furthermore, we will leverage the response variation across the stacked In₂Se₃/MoS₂ devices, measured under identical ${V}_{{BG}}$ biases, to map unidimensional light intensity information into a higher-dimensional space for reservoir computing (RC).

3D optoelectronic reservoir for time-series analysis

RC derived from the framework of recurrent neural networks (RNNs), has become a powerful computational paradigm for processing time-series data and performing pattern recognition^33,34,35. It has been notably applied in key areas such as financial forecasting and weather prediction^36,37. As shown in Fig. 3a, RC leverages a fixed, randomly connected network of nonlinear units, known as the reservoir, to map lower-dimensional input data into a higher-dimensional space, represented as state variables, ${X}_{N}\left(t\right)$. These states are linearly combined with weights ($W$) to produce the predicted output, $Y\left(t+1\right)=\mathop{\sum }_{i=1}^{N}{W}_{i}{X}_{i}\left(t\right)$. The key advantage of RC is that neither the input weights nor the weights of the recurrent connections within the reservoir are trained. Only the readout weights (W), which map the reservoir states to the output, are trained with a simple learning algorithm such as linear regression. This substantially simplifies the hardware realization of RC, requiring only a physical reservoir and a relatively simple readout circuit.

Fig. 3: Hardware realization of M3D optoelectronic reservoir.

a A schematic highlighting the concept of reservoir computing (RC). It leverages a fixed, randomly connected network of nonlinear units, known as the reservoir, to map lower-dimensional input data into a higher-dimensional space. These states are linearly combined to produce the predicted output. b Optical image and (c) corresponding circuit diagram showing the hardware realization of an optoelectronic reservoir and readout circuit based on M3D integration of In₂Se₃ photodetectors and MoS₂ memtransistors.

In this study, we leverage the device-to-device variation in the photoresponse of In₂Se₃ photodetectors stacked with corresponding MoS₂ memtransistors to construct a physical reservoir. The optical image and circuit diagram of our 3D optoelectronic reservoir alongside the readout circuit are shown in Fig. 3b, c, respectively. This 3D optoelectronic reservoir maps unidimensional input stimuli, such as light intensity, into a higher-dimensional space, i.e., photovoltages, ${V}_{{Out},N}$. Here, N denotes the number of readout nodes. Note that RC necessitates a dynamic or fading memory to ensure that the reservoir gradually forgets previous inputs as new ones are introduced, allowing it to rely on both current and past inputs. The finite fall time associated with the photoresponse of the In₂Se₃ photodetectors, as discussed earlier, enables the realization of this fading memory, which is crucial for RC. Lastly, the readout circuit is implemented using another set of MoS₂ memtransistors connected to the reservoir, whose weights are obtained from training and are implemented through non-volatile programming of the corresponding conductance states.

While our system differs from conventional reservoir computers that employ a fixed network of randomly connected nodes to generate recurrent high-dimensional dynamics, it nevertheless leverages intrinsic material variability to provide stochastic weight distributions and nonlinear transformations. We acknowledge that our present demonstration represents a deterministically designed network at a relatively small scale. However, such architectures can still capture useful transient responses and perform complex temporal tasks, aligning with the functional goals of RC. Importantly, the feasibility of synthesizing wafer-scale In₂Se₃ films provides a practical route toward constructing larger and more complex device networks, where the intrinsic variability of the material can naturally enrich the system dynamics and enhance scalability in line with the RC paradigm.

To demonstrate the effectiveness of the 3D optoelectronic reservoir, we use daily stock index data as the input time-series, mapping it to ${V}_{{LED}}$ as shown in Fig. 4a. Specifically, we utilize New York Stock Exchange (NYSE) stock prices over 500 days, converting market fluctuations and trends into respective ${V}_{{LED}}$ pulses over a duration of 5 s. Each day is represented by a 10 ms ${V}_{{LED}}$ pulse, shorter than the fall time, allowing the reservoir to exploit the fading photoresponse memory. Figure 4b presents the ${V}_{{Out}}$ readouts from six pairs of In₂Se₃/MoS₂ devices that construct the optoelectronic reservoir. We used the first 400 readout voltages to train a simple regression model to determine the weights and bias. After determining the readout function, the remaining 100 stock prices were used for testing. The time-series prediction task showed excellent performance for both training and testing, with an R² score of 0.88 for NYSE as shown in Fig. 4c. Similar experiments conducted on other stock prices yielded R² scores of 0.83 for NASDAQ, 0.93 for DJI, and 0.86 for SPI. These results, summarized in Fig. 4d, demonstrate the robustness and effectiveness of the RC system in handling complex, high-dimensional time-series data for financial forecasting with minimal hardware and training requirements.

Fig. 4: Stock price prediction using M3D optoelectronic reservoir.

a New York Stock Exchange (NYSE) stock prices over 500 days mapped into respective ${{{\rm{V}}}}_{{{\rm{LED}}}}$ pulses over a duration of 5 s. Each day is represented by a 10 ms ${{{\rm{V}}}}_{{{\rm{LED}}}}$ pulse, shorter than the fall time, allowing the reservoir to exploit the fading photoresponse memory. b ${{{\rm{V}}}}_{{{\rm{PH}}}}$ readouts from six pairs of In₂Se₃/MoS₂ devices that construct the optoelectronic reservoir. c Actual and predicted stock prices for NYSE after training a simple regression model to determine the weights and bias. d Regression scores (R²) obtained for NYSE, NASDAQ, DJI, and SPI. e Dependence of R² score on the number of nodes (N), i.e., the pairs of In₂Se₃/MoS₂ devices. f Colormap showing the R² values for different N for predicting stock prices i days in advance using our 3D optoelectronic reservoir.

We further investigate the dependence of R² score on the number of nodes (N) of the reservoir, which is equivalent to the number of stacked In₂Se₃/MoS₂ devices. As shown in Fig. 4e, the prediction accuracy increases with increasing N, but the improvement is relatively small for N > 4. The smaller number of devices required for a rather complex task of time-series data prediction makes RC appealing from a hardware implementation perspective for edge devices. We also found that our stacked In₂Se₃/MoS₂ device-based optoelectronic reservoir can be employed to perform an increasingly intensive job of predicting stock prices several days in advance. In other words, the current state of the reservoir, ${X}_{N}\left(t\right)$, is used to predict the state i time steps ahead, ${X}_{N}\left(t+i\right)$, where i >  1. Figure 4f shows the colormap for R² values for different combinations of i and N. As i increases, it becomes increasingly challenging for the system to forecast, thus resulting in a monotonic decrease in the R² values. To avoid compromising the prediction accuracy in a longer time step, N can be increased.

Note that while silicon (Si) technology has been used for hardware realization of RC^38,39, its lack of inherent variability and fading memory makes it less suitable for RC applications.

In contrast, novel materials such as memristors offer inherent non-linearity and memory characteristics that are more conducive to RC^40,41,42. Additionally, photonic and spintronic reservoirs have been demonstrated to offer speed advantages over traditional silicon-based electronics^43,44,45. However, most prior demonstrations using emerging materials or novel physical phenomena still required off-chip readout circuits based on Si technology. Our key contribution is the demonstration of a fully integrated system, where both the reservoir and the readout circuit are on the same chip. Furthermore, our approach leverages the benefits of near-sensor information processing and in-memory compute capability within a 3D stacked architecture.

Discussion

In conclusion, we have successfully demonstrated M3D integration of In₂Se₃ photodetectors with MoS₂ memtransistors, enabling dynamic on-chip calibration and robust management of device variations by leveraging the programmability and non-volatile nature of memtransistors. Furthermore, we constructed a 3D optoelectronic reservoir computing system that achieves high accuracy in time-series predictions. Our demonstration showcases the significant advantages and vast opportunities presented by the heterogeneous 3D integration of functionally diverse materials.

Methods

Large-area monolayer MoS₂ film growth

Monolayer MoS₂ was deposited on epi-ready 2” c-sapphire substrate by metal-organic chemical vapor deposition (MOCVD). An inductively heated graphite susceptor equipped with wafer rotation in a cold-wall horizontal reactor was used to achieve uniform monolayer deposition. Molybdenum hexacarbonyl (Mo(CO)₆) and hydrogen sulfide (H₂S) were used as precursors. Mo(CO)₆ maintained at 25 °C and 625 Torr in a stainless-steel bubbler was used to deliver 4.7 × 10⁻³ sccm of the metal precursor for the growth, while 400 sccm of H₂S was used for the process. MoS₂ deposition was carried out at 1000 °C and 50 Torr in H₂ ambient, with monolayer growth achieved in 11 min. Before growth, the substrate was baked at 1000 °C in H₂ for 10 min. Following growth, the substrate was cooled in H₂S to 300 °C to inhibit the decomposition of the MoS₂ film. More details on the growth process can be found in an earlier work⁴⁶.

MoS₂ film transfer to the local back-gate island

The transfer of the MoS₂ film was carried out using a polymethyl methacrylate (PMMA)-assisted wet transfer technique⁴⁷. Initially, the as-grown MoS₂ on a sapphire substrate was spin-coated twice with PMMA at 4000 rpm for 45 seconds and then left to rest overnight. To enable detachment, the film edges were gently scored with a razor blade before immersing the substrate in deionized (DI) water maintained at 90 °C for 1 h. Capillary action allowed the water to penetrate the interface between the hydrophilic sapphire substrate and the hydrophobic MoS₂/PMMA stack, thereby facilitating separation of the MoS₂ film from the substrate. Subsequently, the substrate was baked at 50 °C and 70 °C for 10 min each to remove moisture and promote film adhesion, thus ensuring a pristine interface. Finally, the PMMA was removed by immersing the sample in acetone for 1 hour, followed by a 30 minute isopropanol (IPA) bath and the substrate was cleaned with a subsequent 30 min IPA bath.

TEM sample preparation

The TEM sample shown in Fig. 1 and Supplementary Fig. 1 were prepared using a Thermo Fisher Scientific (TFS) Scios 2 DualBeam FIB-SEM. To protect the surface from Ga ion beam damage during milling, a two-layer carbon coating was applied: an initial ~0.5 µm layer deposited via a 1.6 nA electron beam, followed by a ~3 µm layer deposited using a 0.3 nA Ga ion beam. An 1.5 µm-thick cross-sectional lamella from the target region was then extracted and transferred in situ to a copper half-grid. Final thinning was performed using a Ga ion beam with stepwise voltage reduction (30, 16, 8, 5, and 2 kV) to minimize beam-induced damage.

STEM characterization of the cross-section

Cross-sectional STEM and EDS imaging (Fig. 1 and Supplementary Fig. 1) were conducted on an aberration-corrected TFS Titan G2 60-300 TEM/STEM operated at 300 kV. Key imaging parameters included a 70 µm C2 aperture, spot size 6, 115 mm camera length, and a 25.2 mrad convergence angle. The HAADF detector collected high-angle scattered electron signals in the 42–244 mrad range. EDS mapping was performed in STEM mode using the Super-X system. The HAADF-STEM images were acquired with a 0.07 nA beam current, while EDS was collected at 0.12 nA. EDS data were processed in Esprit using 1/4 Q-Map pre-processing, the series fit deconvolution method, and P/B ZAF quantification (mass percent, normalized), with 9-pixel averaging for post-filtering. To enhance the contrast of details in the EDS map, gamma and brightness were adjusted in Esprit software. Therefore the elemental maps are qualitative, although spatial distributions are accurately represented. The color intensities are not standardized and should not be compared quantitatively between elements.

Electrical characterization

Electrical characterization of the fabricated devices was performed under atmospheric conditions using a semi-automated Formfactor 12000 probe station with a Keysight B1500A parameter analyzer.

Setup for reservoir computing system

The training of the reservoir computing (RC) system was performed offline. Specifically, each In₂Se₃/MoS₂ device pair was first characterized to extract its photovoltage response to input optical stimuli. These photovoltage outputs—serving as the reservoir states—were recorded for a known time-series input (e.g., NYSE stock data), and the first 400 samples were used to train the readout layer. The training involved applying simple linear regression to determine the optimal weights and bias that map the reservoir states to the target outputs. Once the weights were computed, they were programmed into the MoS₂ memtransistor-based readout circuit using analog, non-volatile conductance tuning. The remaining 100 samples were then used to test the trained system’s prediction performance.